Quickly and easily introduces students to the world of Principles of Modern Communication with both software & real time hardware.

Tesca is pleased to announce the launch of new Software Define Radio with built-in Embedded Computer, on Linux Platform. Unleash the power of GNU Radio ecosystem. System allows to make telecommunication block diagram and equations come to life using simple building blocks. True open ended modelling system allows professors & students to create any model in telecommunication using the available modules and true real time hardware experimentation.

Functional blocks

• Audio
• Control Port
• Coding
• Channelizers
• Channel Models
• Byte Operators
• Boolean Operators
• Debug Tools
• Deprecated
• GUI Widgets
• Fourier Analysis
• Filters
• File Operators
• Error Coding
• FCD
• Equilizers
• Digital Television
• Impairment Models
• Instrumentation
• Level Controllers
• Message Tools
• Measurements Tools
• Math operators
• Paint
• Modulators
• NOAA
• Resamplers
• Pager
• Peak Detectors
• Packet Operators
• Networking Tools
• OFDM
• Stream Operators
• Stream Tag Tools
• Symbol Coding
• Synchronizers
• Trellis Coding
• Type Converter
• UHD
• Variables
• Video
• Waveform Generators
• ZeroMQ Interfaces
• Industrial IO
• Inspector
• Mapper
• Many More

Architecture of SDR System

Technical Specifications

• RF Agile Transceiver
• One Transmit, One Receive Channel (with separate Tuning Frequencies)
• Tuning Range : 350 MHz - 3.5 GHz
• LO step size : 2.4 Hz
• Tunable Channel Bandwidth : 200 KHz - 20 MHZ
• Integrated DACs (Tx) : 12-bit
• Integrated ADCs (Rx) : 12-bit
• Variable Output Data Rates : 61.44 MSPS - 65.1 kSPS
• Modulation Accuracy (EVM) : ≤−40 dB (typical)
• RX Gain Control : 0 to +74.5dB (800 MHZ)
• Received Signal Strength : 100 dB (±2 dB)
• Internal I/Q Correction and Calibration

Antenna

• Frequency Range : 824-894 MHz and1710- 2170MHz
• Connector Type : SMA

FPGA

• Logic Cells : 28k
• Block RAM : 2.1Mb
• DSP Slices : 80

SDR Processing System

1. Single-core ARM® Cortex™-A9 MPCore™ @ 667 MHZ
2. Streams up to 4MSPS with no dropped samples

Embedded Processing System
Quad-core 64-bit @ 1.4GHz

Memory

• DDR3L
• 1066 Mbps (16-bit Interface)
• 512 Mbytes

Serial Flash

• 32 Mbyte
• Quad I/O provides throughput up to 54 Mbps

RAM : 4 GB LPDDR2 SDRAM

• 2.0 USB Ports     :     3 No.
• HDMI Port     :     1 No.
• 14" Color Monitor
• Wireless Keyboard
• Wireless Mouse

Sample Tutorial List Helps You Code Your Own Experiments Without Any Learning Curve

 Analog Communication

• Amplitude Modulation
• Amplitude Demodulation
• Double Side Band with Suppressed Carrier (DSBSC) Modulation
• Double Side Band with Suppressed Carrier (DSBSC) Demodulation
• Single Side Band with Suppressed Carrier (SSBSC) Modulation
• Single Side Band with Suppressed Carrier (SSBSC) Demodulation
• Frequency Modulation
• Frequency Demodulation
• Pulse Amplitude Modulation
• Pulse Amplitude Demodulation

Digital communication

• Sampling and Quanitzation
• Amplitude Shift Keying(ASK) Generation
• Amplitude Shift Keying(ASK) Demodulation
• Frequency Shift Keying(FSK) Generation
• Frequency Shift Keying(FSK) Demodulation
• Binary Phase Shift Keying(BPSK) Generation
• Binary Phase Shift Keying(BPSK) Demodulation
• Quadrature Phase Shift Keying(QPSK) Generation
• Quadrature Phase Shift Keying(QPSK) Demodulation
• Differential Phase Shift Keying (DPSK) Gene-ration
• Differential Phase Shift Keying (DPSK) De-modulation
• Digital Quadrature Amplitude (DQAM) Modu-lation
• Digital Quadrature Amplitude (DQAM) De-modulation
• Bit Error Rate Measurement of DQAM
• Orthogonal Frequency Division Multi-plexing (OFDM) Modulation.
• Analysing Impact of Pulse Shaping and Filtering using Software Defined Radio
• Orthogonal Frequency Division Multiplexing (OFDM) Demodulation.
• Direct Sequence Spread Spectrum(DSSS) Signal Modulation
• Direct Sequence Spread Spectrum(DSSS) Signal Demodulation
• Gaussian Minimum Shift Keying(GMSK) Modulation
• Gaussian Minimum Shift Keying(GMSK) Demodulation
• Bit Error Rate Measurement of BPSK
• Bit Error Rate Measurement of QPSK
• Bit Error Rate Measurement of 8PSK
• Bit Error Rate Measurement of 16PSK

Note : Due to memory and speed limitation of embedded system complex models at high speed may not give desired result